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  w583lxx low voltage powerspeech tm publication release date:april 18, 2005 - 1 - revision a3 table of contents- 1. general description ......................................................................................................... 2 2. features ....................................................................................................................... .......... 2 3. block diagram .................................................................................................................. .... 3 4. pin description................................................................................................................ ..... 4 5. functional description.................................................................................................... 6 5.1 register definition and control ...................................................................................... 6 5.1.1 mode0 register .............................................................................................................. 6 5.1.2 mode1 register .............................................................................................................. 7 5.1.3 page register ................................................................................................................. 8 5.1.4 en0, en1 registers ......................................................................................................... 8 5.1.5 stop register ................................................................................................................. 8 5.1.6 r0-r7 registers ............................................................................................................... 8 5.2 option control function.................................................................................................. 9 5.3 interrupt vector allocation .............................................................................................. 9 5.4 instruction set ............................................................................................................... 1 0 6. electrical characteristics ......................................................................................... 11 6.1 absolute maximum ratings .......................................................................................... 11 6.2 dc characteristics ........................................................................................................ 11 6.3 ac characteristics ........................................................................................................ 12 7. typical application circuit........................................................................................... 12 8. bonding pad diagram ....................................................................................................... 13 9. revision history ............................................................................................................... .15
w583lxx - 2 - 1. general description w583lxxx family is a new powerspeech ? synthesizer series with 1.8v ~ 3.6v operation voltage range. w583lxxx provides ir function, cpu interface, pad option for ring or crystal oscillator and voice output in dac current or pwm type. according to different voice duration, there are 8 part numbers in w583lxxx family, listed as below. part no. w583l10 w583l15 w583l20 w583l25 W583L30 w583l40 rom size (k bits) 384 640 768 896 1024 1472 part no. w583l50 w583l60 w583l80 w583l99 w583l02 rom size (k bits) 1760 2048 3072 3520 4096 note: w583l10 provides less i/o pins, and do not provide crystal oscillator. 2. features ? programmable speech synthesizer ? 5bit mdpcm algorithm to generate high sound quality ? operating voltage range: 1.8 ? 3.6 volts ? direct drive speaker by pwm output or built-in 8-bit d/a converter ? supports cpu interface operation ? ir interface for command transmission and receiving ? symbolic compiler supported ? instruction cycle 400 s typically ? section control ? variable frequency: 4.8/6/8/12 khz ? led: on/off ? eight general-purpose registers r0-r7 ? pad option for ring or crystal oscillator. (w583l10 only provides ring oscillator) ? 8 trigger inputs - with separate control of falling/rising edge trigger. (4 triggers for w583l10) ? 8 stop outputs (5 outputs for w583l10) ? number of interrupt vector / label up to 2,048
w583lxx publication release date: april 18, 2005 - 3 - revision a3 3. block diagram timing generator controller speech synthesizer d/a converter osc/xin xout sel tg1 tg3/irin tg8 stpa/busy stph led1 aud/spk+ spk- rom led2/stpc stpb pwm driver vdd vss test reset irout : : : vdd1 vss1 w583l15~l02
w583lxx - 4 - block diagram, continued timing generator controller speech synthesizer d/a converter osc osco tg1 tg2 tg4 stpa/busy stpe led1 aud/spk+ rom led2/stpc stpb vdd vss test reset stpd tg3/irin spk- pwm driver vss1 vdd1 irout w583l10 4. pin description name i/o description v dd - positive power supply test i test pin, internally pulled low reset i reset all, functions as por, internally pulled high tg1 i direct trigger input 1, internally pulled high tg2 i direct trigger input 2, internally pulled high tg3/irin i direct trigger input 3 or ir inpu t, internally pulled high. once this pin is pulled low, the oscillation circuit is active even the chip enters standby mode. tg4 i direct trigger input 4, internally pulled high v ss - negative power supply led1 o led1 output irout o ir signal output pin, active low stpa/busy o stop signal a or busy signal stpb o stop signal b
w583lxx publication release date: april 18, 2005 - 5 - revision a3 name i/o description led2/stpc o led2 output or stop signal c stpd o stop signal d stpe o stop signal e aud/spk+ o current type output or pwm output for speaker spk- o pwm output v ss1 - negative power supply v dd1 - positive power supply osc/xin i ring oscillator input or crystal input *xout i/o crystal input or oscillator clock output *sel i ring/crystal oscillator select, inte rnally pulled high. floating for ring and grounded for crystal. *tg5 i direct trigger input 5, internally pulled high *tg6 i direct trigger input 6, internally pulled high *tg7 i direct trigger input 7, internally pulled high *tg8 i direct trigger input 8, internally pulled high *stpf o stop signal f *stpg o stop signal g *stph o stop signal h *: these pins no provided in w583l10 pin description only for w583l10 name i/o description osc i ring oscillator input osco o oscillator clock output
w583lxx - 6 - 5. functional description there are up to 8 trigger inputs and 8 stop outputs in w583lxx. the maximal number of software key pad by scanning matrix is up to 8 9 = 72 keys. there are 8 general purpose registers, r0-r7. r0-r7 can apply not only for "ld" and "jp" instructions but also for "mv" instruction. only r0 can apply for "inc" instruction. w583lxx provides ir interface to transmit and receive commands. for example, when x chip executes the "tx r1" instruction, the pulse position modulation waveform (with 38 khz carrier) outputs from irout pin to drive a photo diode. y chips within a certain distance will receive the ir signal through an ir receiver module to tg3/irin pin and execute a "jp" instruction to the interrupt vector/label pointed by r1 of x chip. there are two kinds of events that can cause the w583lxx to enter the poi (power on initialization) process: one is power on, and the other is direct trigger from reset pin. the interrupt vector "32" is allocated for this special event, and its priority is above all, i.e., no triggers can override the poi process if they all happen simultaneously. so the user can write a program into this interrupt vector to set the power on initial state. if the user does not wish to execute a program on power on, he should write an "end" instruction in interrupt vector "32". during the poi process, triggers can then override it successfully; if the en0, en1 and mode0, mode1 registers are set properly. if more than two events happen simultaneously, the priority that is set by the internal h/w is: poi > tg1f > tg1r > tg2f > tg2r > tg3f > tg3r > tg4f > tg4r > tg5f > tg5r > tg6f > tg6r > tg7f > tg7r > tg8f > tg8r > "jp" instruction. 5.1 register definition and control the register file of the w583lxx family is composed of 14 registers, including 8 general purpose registers and 6 special purpose registers. they are defined to facilitate the operations for va rious purposes. the default setting values of the registers are given in the following table. register name default setting general register r0-r7 00100000b en0, en1 11111111b special register mode0, mode1 11111111b stop 11111111b page 00000000b note: en1 register and bits 5-7 of stop register are not provided in w583l10. 5.1.1 mode0 register bit description definition 7 led mode 1: flash 0: dc 6 led2/stpc 1: led2 output pin selection 0: stpc output
w583lxx publication release date: april 18, 2005 - 7 - revision a3 1. mode0 register, continued bit description definition 5 ir output source 1: hardware control ir output 0: stpc control ir output 4 debounce time 1: long 0: short 3, 1, 0 reserved - 2 stpa/busy 1: stpa output pin selection 0: busy output mode0.7 controls the output type of led1 (and led2) pin. mode0.6 controls the configuration of led2/stpc pin. mode0.5 controls the output source of ir. if hardware control ir output is selected, ir output can have signal with carrier or without carrier which is selected by mode1.0. mode0.4 controls the trigger pin debounce time. mode0.2 controls the behavior of the stpa/busy pin which is usually used as busy signal in cpu mode. 5.1.2 mode1 register bit description definition 7, 6, 1 reserved 5 led flash type 1: alternate 0: synchronous 4 led1 section 1: yes control 0: no 3 led2 control 1: section control 0: stpc control 2 led1 volume 1: off control 0: on 0 ir output format 1: ir output carrier with duty cycle 75% 0: ir output without carrier mode1.5 is for led flash type control. mode1.4 is for led1 section control on/off. mode1.3 is for led2 section/stpc control. mode1.2 is for led1 volume control. mode1.0 is for ir output with or without carrier and this bit is useful only mode0.5 is "1". for stpc control ir output (mode0.5 is 0), the ir output always has 38 khz carrier signal no matter what the setting of mode1.0 is.
w583lxx - 8 - 5.1.3 page register bit 7 6 5 4 3 2 1 0 page - - - pg4 pg3 pg2 pg1 pg0 bits 5-7 of page register are reserved; bits 0-4 are used for page selection. the user must setup the page mode configuration described in the option control function section. once the page mode is decided, the working page is selected by the bits 0-4 of page register. hence, the user can execute "ld page, value" instruction to change the working page of the voice entry group. not all of the bits 0-4 of page register are used in different page mode; they are listed below. page mode pg4 pg3 pg2 pg1 pg0 1-page 8-page 16-page 32-page where " " means don t care and " " means must be set properly. 5.1.4 en0, en1 registers bit 7 6 5 4 3 2 1 0 en0 tg4r tg3r tg2r tg1r tg4f tg3f tg2f tg1f en1 tg8r tg7r tg6r tg5r tg8f tg7f tg6f tg5f a "1" means "enabled", while a "0" means "disabled" for that edge of the particular tg pin. for example, the instruction "ld en0, 0x0f" enables all the falling edge triggers of tg1-tg4, while disabling all the rising edge triggers of tg1-tg4. the user can modify the en0 and en1 registers during operation of the w583lxx to achieve various kinds of trigger functions, like retriggerable or not, one shot or level hold play mode, etc. that is to say, users can change the contents of en0, en1 register during synthesis at will to determine which trigger pin is to be enable d or disabled for its falling/rising edge. en1 register is provided only in w583l10. 5.1.5 stop register bit 7 6 5 4 3 2 1 0 stop sth stg stf ste std stc stb sta the stop register is used to control the status of the stpa-stph pins. for example stb bit, the corresponding bit 1 of the stop register is used to drive the output buffer of stpb pin, an inverted stage, to show its logic status. notes that bits 5-7 of stop register are reserved in w583l10. 5.1.6 r0-r7 registers these eight registers function as general purpose registers. they can be used to hold interrupt vector/label. r0 is a special register which can be incremented by "inc" instruction.
w583lxx publication release date: april 18, 2005 - 9 - revision a3 5.2 option control function there are four types of option control in w583lxx. they can be determined by a declaration in the user s program file, but cannot be controlled by register. function mask option declaration definition defpage 1 256 interrupt vector/label for 1 page, 1 page in total (1-page mode) page mode defpage 8 256 interrupt vector/label for 1 page, 8 pages in total (8-page mode) configuration defpage 16 128 interrupt vector/label for 1 page, 16 pages in total (16-page mode) defpage 32 64 interrupt vector/label for 1 page, 32 pages in total (32-page mode) operation normal normal mode operation mode cpu cpu mode operation oscillator osc_3mhz 3 mhz oscillator frequency osc_1.5mhz 1.5 mhz oscillator voice vout_dac dac (aud) output output type vout_pwm pwm output "defpage" decides the page operation mode of w583lxx. the default setting of the page mode is 1-page mode. the 8-page, 16-page or 32-page mode must be declared in order to reach the interrupt vector/label from 256 to 2047 when the interrupt vector/label is beyond 0-255. the w583lxx can communicate with an external microprocessor through the simple serial cpu interface. the cpu interface consists of the tg1, tg2, and stpa/busy pins. "normal" and "cpu" decide whether the operation mode of w583lxx will be normal mode or cpu mode. "osc_3mhz" and "osc_1.5mhz" select the frequency of the system clock. "vout_dac" and "vout_pwm" select the voice output type. 5.3 interrupt vector allocation the w583lxx provides a total of 8 trigger inputs to communicate with the outside world. each trigger pin can invoke 2 dedicate interrupt vectors depending on tg pin status. the table below shows the relationship between tg pin?s status and interrupt vectors. interrupt vectors, 8-15, are not allocated for tg pins in w583l10 because only tg1-tg4 pins are provided in this chip. interrupt vector trigger source interrupt vector trigger source 0 tg1f 8 tg5f 1 tg2f 9 tg6f 2 tg3f 10 tg7f 3 tg4f 11 tg8f
w583lxx - 10 - continued interrupt vector trigger source interrupt vector trigger source 4 tg1r 12 tg5r 5 tg2r 13 tg6r 6 tg3r 14 tg7r 7 tg4r 15 tg8r 32 poi - - 5.4 instruction set there are two types of instruction in the w583lxx, unconditional and conditional instructions. the first type of instructions are executed immediately after they are issued. the second type of instructions are executed only when the conditions specified in the instruction are satisfied. all the instructions are listed in the following table. the cycle time for each instruction is 2/sampling frequency(fs). for fs = 6.0 khz, the cycle time is 333 s. unconditional conditional jp g jp g @sts jp rn jp rn @sts ld en0, value ld en0, value @sts * ld en1, value * ld en1, value @sts ld modei, value ld modei, value @sts ld stop, value ld stop, value @sts ld page, value ld page, value @sts ld rn, value ld rn, value @sts end end @sts mv rn, rm mv rn, rm @sts inc inc @sts tx rn tx rn @sts legend: g: interrupt vector/label rn: r0-r7 rm: r0-r7 modei: mode0, mode1 value: 8-bit data @sts can be the following: @last, @tgn_high, @tgn_low, n = 1 ? 8. but n = 1 ? 4 for w583l10. *: these instructions are not provided in w583l10.
w583lxx publication release date: april 18, 2005 - 11 - revision a3 6. electrical characteristics 6.1 absolute maximum ratings parameter symbol conditions rated value unit power supply v dd ? v ss - -0.3 to +7.0 v input voltage v in all inputs v ss -0.3 to v dd +0.3 v storage temp. t stg - -55 to +150 c operating temp. t opr - 0 to +70 c note: exposure to conditions beyond those listed under absolute maximum ratings may adversely affect the life and reliability of the device. 6.2 dc characteristics (t a = 25 c, v ss = 0v, v dd = 4.5v unless otherwise specified.) parameter sym. conditions min. typ. max. unit operating voltage v dd 1.8 3 3.6 v input voltage v il v ss -0.3 - 0.3 v dd v v ih 0.7 v dd - v dd standby current i sb1 v dd = 1.8v, all i/o pins unconnected, no playing 1 a i sb2 v dd = 3.6v, all i/o pins unconnected, no playing 1 a operating current i op1 v dd = 3v, no load 500 a (ring type) operating current i op3 v dd = 3v, no load 600 a (crystal type) input current of tg1-tg8 pins i in1 v dd = 3v, vin = 0v -8 a input current of test pin i in2 v dd = 3v, vin = 3v 30 a input current of sel, reset i in3 v dd = 3v, vin = 0v -8 a spk (d/a full scale) i dac v dd = 3v, rl = 100 ? -3.0 -4.0 -5.0 ma output current of i ol1 v dd = 3v, vout = 0.4v 0.8 ma stpa-stph i oh1 v dd = 3v, vout = 2.7v -0.8 ma output current of i ol2 v dd = 3v, rl = 8 ? 100 ma spk+, spk- i oh2 -100 ma
w583lxx - 12 - 6.3 ac characteristics parameter sym. conditions min. typ. max. unit oscillation frequency 1 fosc ring oscillator, rosc = 560 k ? 2.7 3 3.3 mhz ring oscillator, rosc = 1.2 m ? 1.3 1.5 1.7 oscillation frequency deviation by voltage drop ? fosc fosc f(3v)-f(2.4v) f(3v) 7.5 % instruction cycle time tins fosc = 3 mhz, sr = 6 khz 1/3 ms poi delay time t pd fosc = 3 mhz 160 ms long debounce time t debl fosc = 3 mhz, sr = 6 khz 50 ms short debounce time 2 t debs 400 s notes: 1. this parameter is different from that of w58300. 2. for ring oscillator only. 7. typical application circuit rosc aud/spk+ spk- vss vcc vdd xout osc/xin w583lxx tg2 tg1 tg4 tg3/irin tg6 tg5 tg8 tg7 stpa/busy stpb led2/stpc stpd stpe stpf stpg stph led1 vcc sel vdd1 test irout vss1 vcc reset
w583lxx publication release date: april 18, 2005 - 13 - revision a3 8. bonding pad diagram (for w583l10 only) (0,0) 2 1 3 4 5 678910111213141516171819 20 21 pad no. pad name pad no. pad name 1 v dd 12 led1 2 osc 13 stpa/busy 3 osco 14 stpb 4 test 15 led2/stpc 5 reset 16 stpd 6 tg1 17 stpe 7 tg2 18 v ss1 8 tg3/irin 19 v dd1 9 tg4 20 spk- 10 v ss 21 aud/spk+ 11 irout - -
w583lxx - 14 - (for w583l15 to w583l02) (0,0) 2 1 3 4 5 67891011121314151617181920212223242526 27 28 29 pad no. pad name pad no. pad name 1 v dd 16 irout 2 osc/xin 17 led1 3 xout 18 stpa/busy 4 sel 19 stpb 5 test 20 led2/stpc 6 reset 21 stpd 7 tg1 22 stpe 8 tg2 23 stpf 9 tg3/irin 24 stpg 10 tg4 25 stph 11 tg5 26 v ss1 12 tg6 27 v dd1 13 tg7 28 spk- 14 tg8 29 aud/spk+ 15 v ss - -
w583lxx publication release date: april 18, 2005 - 15 - revision a3 9. revision history version date page description a0 aug. 30, 2002 - initial issued a1 oct. 3, 2002 - modify rosc value on page 11 a2 may 16, 2003 - add w583l80~w583l02 a3 april 18, 2005 - add important notice important notice winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. further more, winbond products are not intended for applications wherein failure of winbond products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur. winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify winbond for any damages resulting from such improper use or sales. headquarters no. 4, creation rd. iii, science-based industrial park, hsinchu, taiwan tel: 886-3-5770066 fax: 886-3-5665577 http://www.winbond.com.tw/ taipei office tel: 886-2-8177-7168 fax: 886-2-8751-3579 winbond electronics corporation america 2727 north first street, san jose, ca 95134, u.s.a. tel: 1-408-9436666 fax: 1-408-5441798 winbond electronics (h.k.) ltd. no. 378 kwun tong rd., kowloon, hong kong fax: 852-27552064 unit 9-15, 22f, millennium city, tel: 852-27513100 please note that all data and specifications are subject to change without notice. all the trade marks of products and companies mentioned in this data sheet belong to their respective owners. winbond electronics (shanghai) ltd. 200336 china fax: 86-21-62365998 27f, 2299 yan an w. rd. shanghai, tel: 86-21-62365999 winbond electronics corporation japan shinyokohama kohoku-ku, yokohama, 222-0033 fax: 81-45-4781800 7f daini-ueno bldg, 3-7-18 tel: 81-45-4781881 9f, no.480, rueiguang rd., neihu district, taipei, 114, taiwan, r.o.c.


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